Akshat Yadav

535 Pontius Avenue North, Apt 526, Seattle, WA 98109 • ayadav2@ncsu.edu • 919-985-6748

OBJECTIVE: Looking for full time opportunity in the field of Electrical Engineering.
North Carolina State University, Raleigh, North Carolina Dec 2015
Master of Science, Electrical Engineering
Analog Integrated Circuits, Power Electronics, Digital Control systems, Electric Drives, Digital ASIC design, Power Management
ICs, Power Electronics Design & Packaging, Digital Signal Processing, Dynamics and Control of Electric Machines, Energy Storage
Systems, ASIC Verification.
Certificates – Machine Learning (Stanford University), Control of Mobile Robots (GTech.), Advanced Sensor Technology (IISc),
Embedded System (Ducat), Organic Solar Cells(Technical University of Denmark), Chinese for Beginners (Peking University)
J.S.S. Academy of Technical Education, Noida, India May 2011
Bachelor of Technology, Electrical Engineering 1st Division

Languages: C, C++, Python, OOP (implementation in MATLAB), Verilog, System Verilog.
Software: Matlab R2014a, Allegro PCB designer, OrCAD Pspice, NI LabVIEW, ModelSim, Synopsys, Virtuoso, CCS, PLECS, Kiel.

Graduate Technical Assistant Feb. 2015 – Present
NSF FREEDM System Center, NCSU (Raleigh, NC)
• PCB designing (layout, soldering, debugging) for CPLD based intelligent gate driver, Optical Interface & Power Supply Circuits:
The design includes a 4-layered PCB with both analog (sensors, Comparator IC’s) and digital (CPLD) components, with focus on
maintaining good signal integrity.
• PCB designing (layout, soldering, debugging) for double pulse test setup of GaN DUT.
• PCB design for integrated capacitive coupling: 4 layered PCB with tracks in all the layers forming the winding of the isolation
transformer to reduce the capacitances.
• Publication: A MV Intelligent Gate Driver for 15kV SiC IGBTand 10kV SiC MOSFET.
Junior Research Fellow Dec. 2012 – Jun. 2014
Aeronautical Development Establishment, DRDO (Bangalore, India)
• Assisted the testing and implementation of flight control sensors used in UAV’s.
• Main responsibilities: Development of AHRS (attitude and Heading reference System) using MEMS based sensors,
dsPIC µcontroller including INS-GPS integration through Kalman Filtering.
Project Assistant Nov.2011 – Dec. 2012
Central Institute of Mining and Fuel Research, CSIR (Dhanbad, India)
• Supplied and monitored High Voltage (Up to 15Kv) for the production of Non-thermal Plasma with the help of Digital CRO, Step-
Up Transformer and auto-transformer.

Analysis and Design of DC-DC Forward Power Converter. Aug. 2014-Dec.2014
• Incorporate the design of converter, transformer, and clamp circuit with selection of power switches, diodes capacitors and
inductors, Controller designing, efficiency calculation and simulation in PLECS.
3-phase induction machine modelling & Field oriented control. Aug. 2015-Dec 2015
• d-q modelling in 1.) Stationary reference frame 2.) Synchronously rotating reference frame 3.) Rotor Flux reference frame
• Torque control of 3-phase induction motor using Direct and Indirect Rotor Field Orientation.
Design of a synchronous buck converter for mobile application. Jan 2015- May 2015
• DC/DC Synchronous buck converter using 65nm ONSEMI CMOS technology was designed for 1.8V DC on output @ 1A peak
current rating from 2.7-5V input. Converter was designed to work with 10mV and 100mV of line and load regulations along
with an additional implementation for soft start mechanism, deep sleep and standby mode of operations.
Design of a CMOS operational transconductance amplifier (OTA). Aug. 2014-Dec.2014
• Designed a single ended operational transconductance amplifier with a gain of 82 dB, a gain bandwidth product of 182 MHz,
80ᵒ phase margin, output swing of 1.2 V peak to peak, settling time of 17 ns and a rail to rail input common mode range in a
180nm CMOS technology. The project was simulated in cadence with Spectre RF simulator.
Implementing Jacobian Algorithm to solve System Equation for Power System applications using Verilog. Jan 2015- May 2015
• Implemented jacobian iteration method using Verilog for optimum performance per unit area.
Torque Optimization of a Switched Reluctance motor. Aug. 2014-Dec.2014
• Development and Analysis of the response, reduction of torque ripple of the simulated model using Simulink.

  • Updated 8 years ago

To contact this candidate email ayadav2@ncsu.edu

Contact using webmail: Gmail / AOL / Yahoo / Outlook

This entry was posted in . Bookmark the permalink.