Joy Shukla

Joy Shukla
Experienced yet Inquisitive professional in Embedded Firmware development looking for career
advancement
 shukla.joy@gmail.com  +1(515)708-8912  Minneapolis, MN  www.linkedin.com/in/joyshukla
Work Experience
01/2014 – Present Shakopee, MN
Firmware Engineer II
Seagate Technology
Working on SAS Interface related feature development
Using various debugging tools and techniques to troubleshoot and
debug firmware issues
01/2013 – 12/2013 Ames, IA
Graduate Research-Teaching Assistant
Iowa State University
Electrical and Computer Engineering
Working in Digital Smithy lab on robotics and machine vision
Conducting recitation and labs for Embedded Systems and Digital logic
course
09/2010 – 12/2012 Gandhinagar, Gujarat, India
Senior Software Engineer
iGATE Corporation
For client MetLife Inc
Developed regression testing framework for autonomously testing
various MetLife websites using Quick Test Professional(QTP)
03/2010 – 07/2010 Gandhinagar, Gujarat, India
Intern
KRemot Remote Control Systems
KREMOT is leading manufacturer and exporter of Remot Control System
Develop a testbench to test manufactured electronic boards using
Atmel micro-controller interfaced with RTC, EEPROM and label printer
Tasks
Tasks
Tasks
Tasks
Education
01/2013 – 12/2014 Ames, IA
Master of Science
Iowa State University
Computer Architecture Wireless Sensor Networks
Real Time Systems Reconfigurable Computing
Models and Techniques in
Embedded Systems
09/2006 – 06/2010 Aanand, Gujarat, India
Bachelors of Engineering
Sardar Patel University
Embedded Systems Design Digital Computer Organization
Microprocessors 8085/86 Microcontroller 8051
Courses
Courses
Skills & Competences
C/C++ SAS/SCSI
Python VBScript
Unix Trace32 ARM debugger
JDSU Perforce
Matlab Quick Test Professional
Verily/VHDL ModelSim
Academic Projects
An analysis of various workloads to derive guidance for an optimal investment
strategy to balance the SSD and HDD.
Perform image processing using parallel Computing on Convey HC-2 platform
which comprises four Xilinx Vertex-5 FPGAs
Hybrid Drive Economics – Master’s Thesis
Image processing on FPGAs
Achievements
Published a paper in the International journal of Computer Applications in
Engineering, Technology and Sciences (ISSN: 0974-3596)
Successfully demonstrated the Idea “Manual Validation of S&P Scripts using
QTP Framework” and received Small Steps award at iGATE Corp
Appreciated for creating autonomous scripts that save time and eorts of manual
testing team with Pat on the Back(POB) at iGATE Corp.
Multi-Channel Temperature Monitoring
Small Steps
Pat on the Back
Languages
Expert Expert
Native or Bilingual
English Hindi
Gujarati
Interests
Technology | Volunteering | Running | Biking | Travelling