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Roman Filler Last updated: 02/15/16
Job Title: no specified
Company: no specified
Rating: no specified
Screening score: no specified
Status: no specified
Springfield, NJ 07081
Contact Preference: Email
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Resume Headline: Resume_2016.pdf Resume Value: b5b5byibzkyv5rmn
955 S. Springfield Ave #2403, Springfield, NJ 07081; (973) 912-0783(H), (973) 986-5880 (C)
CAE Software tools:
06/2012 – Present
Electrical Engineer with over 13 years of professional experience in the
medical, defense and consumer product industries. Highly experienced in
mixed signal and FPGA designs, simulation, verification and system
VHDL, Verilog, Visual Basic,
Mentor Graphics DX Designer, PADS Logic; Cadence ORCAD, Allegro.
FPGA/CPLD Design Tools: Actel Libero, Xilinx ISE.
PIC18/24/32, TMS320, ARM7/9, Cortex A8, AM3358, OMAP3503.
Oscilloscope, logic analyzers, SONET/SDH test set, BERT.
RS232/RS485/RS422, CAN, SPI, I²C, USB, DDR, Ethernet, 802.11,
Windows, Linux, UNIX.
Datascope/MAQUET Cardiac Assist Division, Mahwah, NJ
Sr. Electrical Engineer
• Lead electrical engineer responsible for design of a multi processor based electronic system that provides
control, command and monitors communication interfaces to motorized pumps, sensors, LCDs within
new heart and lung medical device.
• Responsible for system conceptualization, architecture development, requirements definition, detail
design documentation, generation of verification, validation test procedures and completion of
documentation for transfer to production.
• Utilized Allegro schematic capture software for mixed signal design consisting of multiple processors,
Ethernet, CAN, RS232 communication interfaces, DC/DC switching and linear regulators, external
memory, A/D, D/A converters and PWM control circuits.
• Responsible for hardware/software debugging and testing with TI’s Code Composer.
• Provided guidance for multilayer, impedance controlled PCB layout.
07/2010 – 05/2012
Kearfott Guidance & Navigation, Little Falls, NJ
Sr. Electrical Engineer
• Led design effort of replacing an obsolete ASIC and DSP on Inertial Measurement Unit that provides
status, control, command and communication interface functions of monolithic ring laser gyro and
inertial accelerometer electronics for military, air and sea navigation applications.
• Responsible for development of hardware architecture, detailed design requirements, interface control
document, simulation and verification testing for DO-254 requirements.
• Utilized DX Designer schematic capture for mixed signal design including complex FPGA, DSP, RAM,
ROM, A/D, D/A converters, RS232/RS422 interfaces, analog/digital discrete components, DC/DC linear
and switching high power supplies.
• Drafted guidelines for PCB layout.
01/2010 – 06/2010
Energy Hub, Brooklyn, NY
Sr. Electrical Engineer
• Redesigned wireless electronic gadget consisting of ARM Cortex A8 core (TI OMAP3503) processor
with integrated Power Management (TPS65950 PMIC), NAND flash & mobile LPDDR PoP memory,
Micro SD card, WLAN/Bluetooth, ZigBee wireless modules, 4.3” capacitive touch-screen LCD, USB
host and audio codec interfaces.
03/2007 – 01/2010
International Battery Inc. Oakland, NJ
Sr. Electrical Engineer
• Lead engineer responsible for design of a microcontroller based electronic system providing control,
command and communication interface for commercial/defense aerospace and telecommunications
• Utilized ORCAD schematic capture for mixed signal design including microcontroller, external memory,
A/D, D/A converters, CAN, RS232 communication interfaces, discrete components, DC/DC linear and
switching power converters and driver circuits.
• Provided guidance for PCB layout and routing.
• Responsible for all aspects of the project including architecture development, requirements definition,
test procedures, components evaluation, completion of documentation for production and supervision of
compliance testing for UL, CE and Mil-STD approvals.
01/2006 – 01/2007
• Completed hardware/software debugging and testing with Microchip MPLAB development tool.
Ethicon, Inc. (Johnson & Johnson Company) Somerville, NJ
• Responsible for the development of hardware requirements and design of hand held electronic unit
consisting of ARM9 core processor, external memory (SDRAM, Flash, EEPROM), CPLD, A/D, D/A,
communication interfaces (USB, RS232, Ethernet), DC/DC linear and switching power converters,
stepper motor driver circuits, sensors and touch-screen LCD.
• Completed design-specs, functional block diagrams, schematic entry and provided guidance for PCB
placement and routing.
05/2002 – 11/2005
Smiths Aerospace – Electronic Systems, Whippany, NJ
Electrical Project Engineer – Vehicle Management System
• Designed interface control module of the High Voltage Distribution Unit for a joint unmanned combat air
system (JUCAS X47-B).
• Utilized ORCAD schematic capture for board level design that included dual processor, CPLD, mixed
signal circuits, linear and switching power converters, communication interfaces, isolators, filters and
passive discrete components.
• Responsible for all circuit modifications, hardware/software debugging, testing and generated
documentation for system integration and production.
• Drafted guidance to PCB designers for layout and routing
• Designed (ICM) of the battery charger/converter system for the Joint Strike Fighter (JSF). Major
functionalities of the ICM to provide control, command, monitor and communication interface to
Charger/Heater Power Supply Module, Power Control Module, Power Distribution Center and Battery
06/2000 – 04/2002
Lucent Technologies, Inc. Holmdel, NJ (Optical Networking Group)
Hardware Engineer (MTS)
• Contributed to complex FPGA design of OC48 and OC192 port cards to provide communication
interface between Switch controller module and the OC48/OC192 circuit packs. Utilized Altera FPGA
and Mentor Graphics schematic capture tool.
• Hardware simulation of the Performance Monitoring Parameter Accumulator block for OC48/OC192
circuit packs. Simulated circuits consist of ARM7 core processor, FPGA, networking subsystem
SONET/SDH framer device, external memory and discrete glue logic.
01/1998 – 05/2000
Data Products of New England Technologies, INC. Wallingford, CT
Junior Hardware Engineer
• Involved in hardware design and testing of the Secure Route Monitor module. Design included bidirectional
format conversion between Conditioned Di-Phase Interface and Non-Return to Zero (NRZ)
signals at tactical rates of up to 4608Kbps.
• Redesigned and tested existing asynchronous interface card due to parts obsolescence.
Purdue University (School of Electrical Engineering)
BS Electrical Engineering, Minor: Mathematics.
Experience BACK TO TOP
Job Title Company Experience
EE Datascope/Maquet – Present
Additional Info BACK TO TOP
Current Career Level: Experienced (Non-Manager)
Years of relevant work experience: 7+ to 10 Years
Date of Availability: Within 2 weeks
Work Status: US – I am authorized to work in this country for any employer.
Active Security Clearance: None
US Military Service:
Citizenship: US citizen
Target Job: Target Job Title: Electrical Systems Engineer
Desired Status: Full-Time Part-Time Per Diem
Target Company: Company Size:
Target Locations: Selected Locations: US-NJ-Northern
Willingness to travel: No Travel Required
Languages: Languages Proficiency Level