Ruoshui Zhang

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Electrical, Firmware Engineer, 2016 grad

Minneapolis, MN

Ruoshui Zhang
Cell Phone: 612-232-9455
E-mail address: zhan1231@umn.edu
Mailing Address: Apt 3-11, 609 Oak Street SE, Minneapolis, MN 55414

Objective:
Full-time position starting January, 2016

Educational Background:
University of Minnesota – Twin Cities
Bachelor of Electrical Engineering graduated in May 2014
Pursuing Master’s Degree of Electrical Engineering will graduate in December 2015

Major courses taken & in progress:
VLSI automation; Linear System & Optimal Control; Probability and Stochastic Process;
Optimal Filtering & Estimation; System Engineering; VLSI lab; VLSI design; Revenue
Marketing; Communication Systems; Computing Systems; Microcontrollers; Verilog; Signals
and Systems; Semiconductor Device; State Space Control, Electric Drives, Advanced Analog
Design, Probability of Electrical Circuit; Transmission lines; Power Electronics; Magnetic
Recording; Computer Architecture; Renewable Energy Storage

Skills:
• Programming Languages: Strong MATLAB skills, proficient with C++, MPLAB IDE,
HSPICE, PSPICE, Verilog. Good knowledge of C-based programming languages,
assembly programming, Python, and Verilog
• Software: Proficient with Microsoft word, Excel, PowerPoint, and related products
• Operating System: Strong troubleshooting skills about different versions of Windows
Operating Systems and different software (e.g. Antivirus, system cleaning, file-detecting)
• Hardware: Proficient with circuit, system and signals analysis
Hands-on lab working experience
Good knowledge of computer hardware structure and microchip layout
• Language skills: Strong Verbal and written skills in English and Mandarin Chinese
Experiences:
• Seagate Technology, Shakopee, MN May, 2014 to August 2014
Work as a summer intern in firmware department to finish a project on simulation
for Direct Offline Scan feature of HDD. Mainly writing script in MATLAB software.
• Seagate Technology, Shakopee, MN February, 2015 to April, 2015
Continue to work as a part-time intern in firmware department to finish a project on
simulation for Direct Offline Scan feature of HDD. Mainly writing script in MATLAB
software.
• Seagate Technology, Bloomington, MN May, 2015 to August, 2015
Work as a summer intern in Failure Analysis department to finish a project on
Powered AFM scan. Work includes software design(using MATLAB) and hardware
connection on the AFM machine.
• NOvA Neutrino Lab March, 2012 to September 2013
Undergraduate Research Assistant, familiar with all the normal working
environment in huge labs, have experience in the regular production pipeline, and
have done mechanical work such as stringing, pressure testing, final Q&A, painting,
etc.
• Chinese Career Development Association Member December, 2011 to Now
In charge of information gathering, data collecting and analysis
• Friendship Association of Chinese Student and Scholars Member
September, 2010 to Now
• University Dining Services: 1 year working experience January, 2011 to January,
2012
Have been in the position of student manager, and have good communication skills.

Projects:
Senior Design Project: Presence Sensor for Garden Mowers Fall 2013
• Teamed with four students and worked together with engineers in TORO
Company to design an electronic device controlled by microchips to replace the
mechanical level used on the garden mowers.
• Was in charge of the PCB design, the PSPICE layout, and the alternative
solutions during the project.
• Used capacitive presence sensing technology by connecting the sensing chips on
the handler, and adjusting the sensitivity using a microcontroller chip.
• The final product was able to successfully detect human presence even if the
user is wearing thick working gloves.

Portable EKG Medical Device (heart beat oscilloscope) Fall 2012
• Leaded a team of five in the designing of an amplifier with noise filter which
has the gain approximately to 1000 times.
• The filter was mainly composed by two amplifying chips and a differential chip
to eliminate the natural vibrating noise of human bodies.
• Was also in charge of the designing part, did all the PSPICE layout work, ran
multiple tests, did and finished the final assembly of the device.
• The final built device successfully showed a detailed waveform of human heart
beat in the final presentation.

32-bit Adder Integrated Circuit Design Fall 2014
• Individually designed a 32-bit adder using Virtuoso software.
• Carefully designed both layout and schematic to fit the requirement of the adder, which
is frequency and the size of the layout.
• The final layout successfully performed as a functional 32-bit adder.

  • Updated 8 years ago

To contact this candidate email zhan1231@umn.edu

Contact using webmail: Gmail / AOL / Yahoo / Outlook

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