TBMCMAHON654@GMAIL.COM – 715-781-6329
Authorized to work in the US for any employer
Seagate Technologies – Bloomington, MN – 1999 to 2015
• Responsible for executing ESD and accelerated life testing on advanced reader designs, validating that the
projected device reliability metrics can be met as the reader size, material composition and geometries change.
• Designed a near field transducer (NFT) thermal-life test for the Heat Assisted Magnetic Recording (HAMR)
team resulting in a throughput improvement of 6-10x and enabling quick feedback / optimization of NFT design
materials, geometries, and process change choices.
• Enabled three initiatives to increase head yields through feature size reduction (densification).
◦ These wafer densification efforts resulted in hundreds of thousands of dollar saving/day in production cost.
◦ Accomplished by working closely with test equipment vendors to improve the positioning capability, providing
the accuracy needed to maintain all test capabilities.
• Developed 4-pt probing / measurement capability for readers incorporating electrically removable (ERS)
shunts. As a result, the feasibility of electrically removable shunts and the 10x ESD protection they provided
was maintained over multiple product design cycles.
◦ Reduced gage capability losses in ERS reader tests by creating new routines that scale resistance, amplitude
and noise metrics to their projected levels once the shunts were removed. (ERS shunts typically attenuate
reader test metrics by 15-30X, and result in similar increases in test variability.)
◦ Transferred this technology to the overseas manufacturing engineering teams.
• Designed test equipment to remove ERS shunts from the readers. Removing the shunts enabled design
validation (DVT) testing of readers incorporating ERS shunts without a loss in test accuracy / gage capability.
This shortened design feedback on new designs by allowing testing to get underway several weeks earlier
in the build process.
• Researched methods to improve basic reader property tests, identifying several tests worthy of further
◦ Evaluated intrinsic reader noise measurement employing a two channel strategy to subtract uncorrelated
amplifier noise from correlated reader noise. Identifying several promising approaches.
◦ Developed a differential conductance test utilizing several lock-in amplifiers to assess whether meaningful
insight into barrier quality can be obtained under room temp conditions, generating several promising scans
worthy of further investigation.
Senior Design Engineer
• Investigated setting magnets, acquired and deployed a 3 tesla superconducting magnet into the factory in
Penang, Malaysia to meet the needs of our advanced reader designs.
• Qualified ISI bar level testers for deployment into the factory. Trained the Penang engineers on the setup,
alignment, and maintenance of the equipment.
• Designed test equipment to characterize the performance of hard disk drive heads including: design of ultra-
low noise bias and sense amplifiers, digital control circuits, and VHDL programmable logic, for use in transfer
curve and static contact testers.
Advanced Design Engineer
3M Company / Imation Corporation – Maplewood, MN
Advanced Design Engineer:
• Designed and developed test equipment associated with magnetic tape, audio/video switchers, medical
devices, magnetic security markers, vacuum deposition and thin film coating quality.
• Responsible for scaling up manufacturing, assembly, and test processes associated with surface mount and
thick film hybrid circuits.
Plant Quality Control Engineer – Cynthia Kentucky
• A manufacturing plant for plain paper copiers, overhead projectors, printing and micrographic duplication
• Responsible for development of plant quality control manuals and procedures.
• Oversight of incoming component inspection as well as development of manufacturing quality control audit
• Maintaining factory UL / CSA testing & regulatory compliance.
B.S. in Electrical Engineering
Western Michigan University
• Accelerated Life testing using ReliaSoft ALTA software.
• Statistical data analysis using JMP, Matlab.
• Design for Six Sigma (DFSS) trained.
• Electronic / PCB Design using Altium / Protel PCB software.
• Experienced with DAQ control using National Instruments development products & Matlab.
• High frequency electronic design and board layout.
• Circuit design analysis and simulation.
• Completed Design for Six Sigma design methodologies.
• Altera programmable logic design.
• Experience with a broad range of instrumentation programming.
Lab Instrument Expertise
• Tektronix oscilloscopes, HP/Agilent signal analyzers, spectrum analyzers, network analyzers and LCR
• Stanford Research SR830 Lock-in Amplifiers.
• Keithley 2400 SMU’s, Lightwave LDC3210 Laser Diode Drivers.
• Signatone Wafer Probing Station
To contact this candidate email TBMCMAHON654@GMAIL.COM