Yaser Khalifa

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Yaser Khalifa
Last updated: 09/22/15

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Bethlehem, PA 18017
US

Mobile: 6107149110
yaser70ma@hotmail.com
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RESUME

Resume Headline: Yaser Khalifa – Lead Hardware Engineer Resume Value: ynxrbx8if6seawgu

Yaser Khalifa, PhD
219 Mountain Rest Rd
New Paltz, NY 12561
Phone. (610) 714 – 9110 • yas1970man@outlook.com

HARDWARE DESIGN ENGINEER
Accomplished and resourceful Hardware and Embedded Systems Design Engineering Professional with extensive, hands-on experience in optimization algorithms, digital and mixed circuits design, PCB Design and tools, Signal integrity, working with interdisciplinary design teams to introduce innovative products, and develop technology partnerships and alliances. Strong background in developing artificial intelligence and evolutionary algorithms-based systems and solutions for analog/digital circuit design, and optimization. Author of more than 45 international journal and conference publications and one book. Possess excellent communication and presentation skills. Demonstrated expertise in:
Analog/Digital Circuit Design • Signal Integrity • Multilayer PCB Designs • Design Optimization Automation Tools • Embedded Systems • Signal Processing • Hardware/Firmware Integration • PLDs / FPGAs Architecture • PCI/PCIe • C/C++/Assembly Languages • ARM7 / Freescale / PIC / Intel / TI DSP Controllers
Hyperlynx Signal Integrity/Power Integrity/Design Rule Check DRC tools • VHDL/Verilog • P/HSPICE • MatLab / Simulink • Data Acquisition Systems

PROFESSIONAL EXPERIENCE
ABB Inc. • August 2011 – Current
Distribution Automation R&D Center – Lead Hardware Engineer, Hardware Architect
Developing new distribution automation protection relays, and new generation of smart protection relays. Duties include; US Team Hardware Architect, and CPU Board Module Designer. Duties involve Multilayer PCB design constraints with focus on signal integrity and power integrity issues, grounding and Electromagnetic Compatibility (EMC) constraints. Designs incorporate DDR2/3, multicore controllers, PCI and PCIe, FPGA and CPLD designs, NANDs and NORs memories.
• Several Patents have been filed for novel designs for a platform adaptation and grounding schemes.

GE Global Research Center • August 2010 – August 2011
General Electric Global Research – Electrical Engineer Consultant
Developing the Next Generation Air Traffic Control Systems (NextGen) for better ground air communication, synchronization, sense and avoid, and trajectory planning. Also developing innovative sense and avoid systems for Unmanned Arial System (UAS). Developing FPGA based embedded solutions for applications in Healthcare and Oil/Gas. This is a high speed FPGA communication board incorporating PCIe, AURORA protocols in addition to a 8GB SODIMM DDR3 chip to meet very high speed data rates requirements. I am also the architect of an innovative and modular Energy Management Supervisory System for Hybrid Bus using DSP TI embedded controller (28335) for real-time control and integrating intelligent predictive control algorithms.
• Played a key role to generate a patent disclosure on novel techniques for a Trajectory Based Sense and Avoid Techniques for Unmanned Arial Vehicles

GEnergy • June 2008 – August 2010
Embedded/Hardware Systems Engineer
Lead R&D engineer for new innovative devices for energy monitoring and management systems that incorporate FM and ISM, and zigbee transmissions as well as Power Line Carrier (PLC) components. Resolve signal processing issues such as noise, and EMI interferences through robust SNR designs.
?Several patents have been awarded and are in the final prototyping stage while two other patents are in the workout phase.

GE Global Research • Summer 2008
General Electric Global Research – Research Consultant
Worked on three projects involving firmware for an open-modular embedded smart sensing architecture (Office of Navy Research), developed a cognitive utility metering system (GE) and an innovative high-speed serial link with ?? modulators and digital filters using FPGAs for fiber optics communication (DARPA).
?Generated a patent disclosure for new non-intrusive appliance load monitoring cognitive metering system algorithm.

State University of New York at New Paltz • Jan. 2002 – Dec. 2008
Assistant Professor, Electrical and Computer Engineering Department
Created microprocessor and embedded system based courses, digital circuit design and optimization at the undergraduate and graduate levels. Established the Intelligent Systems Research Laboratory that produced nearly 45 publications, including journals, conference proceedings and book chapters.

University of North Dakota • Aug. 1998 – Dec. 2001
Assistant Professor, Electrical and Computer Engineering Department
Taught microprocessor and embedded system based courses, Computer Architecture, digital circuit design at the undergraduate and graduate levels.

Industrial Consulting Projects Accomplished On Personal Time While Holding my Academic Position:

FALA Technologies – Embedded Firmware/Software Engineering Consultant (Feb – July 2008)
Led design and development efforts for embedded systems, including an embedded controller for the operation and power management of a solar industrial application. Designed an embedded system for a semiconductor wafer alignment and inspection unit, using a 1024 pixels optical array for positioning and alignment purposes, and a microcontroller PCB board, DC brushless motor and a driver enabling alignment data to be sent to a robot and a main server via TCP/IP link.

ECO Physics – Embedded Firmware/Software Engineering Consultant (2003-4)
Collaborated with members from two high-tech semiconductor firms to design and develop an embedded system for monitoring and controlling a chem-mech polishing process in real-time. Provided system specification, and code design using assembly and ‘C” languages, and integrated design into the existing monitoring and control system.

PhD THESIS

Evolutionary Methods for the Design of Electronic Analog Circuits and Systems
In my doctorate research, I developed a C++ and ANSI C code for an automated circuit design optimization tool for analog circuits. This innovative tool functions as a black box, accepting design specifications and outputting automated circuit designs that are both optimized and novel. The tool also included modules for free structure circuit simulation and design centering. The technique was further enhanced by including a design centering module. I have further developed the techniques to include digital circuits. I have also successfully applied it to a wide variety of design optimization applications with great success. I think these innovative ideas combined with my strong academic background and hands-on experiences would help investigate and define new areas of technology to enhance and optimize not only existing products, but also plan for new and innovative products and devices.

SELECTED PATENTS

• Intelligent Electronic Device Enclosure. 29/465,540 (2013, ABB Inc)
• U Form-Factor Intelligent Electronic Device (IED) Hardware Platform With Matching Of IED Wiring, From a Non U Form-Factor IED Hardware Platform Using Adapter Structure 14/013,064 (2013, ABB Inc)
• Mechanical Assembly and Methods to Provide Form-Factor and Wire Alike Adaptation of Existing Platform Hardware Modules into New Products. 14/013,077 (2013, ABB Inc)
• Trajectory Based Sense and Avoid for Unmanned Ariel Vehicles – (2010, GE Global Research)
• Real time management of energy assets for optimization of resource utilization – #1756.012 (2009, Genergy)
• Real time home energy management system – #1756.013 (2009, Genergy)
• Innovative non-intrusive appliance monitoring system – (2009, GE Global Research)
• Multi-Media Player’s Synchronizer – #1756.015 (2009, SUNY Research Foundation)
• Automated Storm-Water Basin Management System (recent filing, Genergy)
• Smart Embedded Solar Power Controller (recent filing, Genergy)

AWARDS & GRANTS

?Two exceptional performance Awards for resolving two major global design problems that cause production shut down for affected products 2011 – 2014
?Distinguished Professor of the Year 2006-2008, Electrical and Computer Engineering Department, SUNY New Paltz.
?Promising Inventor Award, the Research Foundation, State University of New York, November 2005
?National Science Foundation, AMP & AC2 CSTEP Research Award, 2002- 2007
?SUNY Research and Creative Projects Award 2002 – 2007

CITIZENSHIP
USA
EDUCATION
Cardiff University, Cardiff, UK
Ph.D., Electronics Engineering, 1997
PhD Thesis: Evolutionary Methods for the Design of Electronic Analog Circuits and Systems

Alexandria University, Alexandria, Egypt
BSc., Communications and Electrophysics, 1992

Yaser A. Khalifa, PhD
219 Mountain Rest Rd
New Paltz, NY 12561
Phone. (845) 901-4984 • yaser70ma@hotmail.com

ADDENDUM

PUBLICATIONS
Book
• Genetic Algorithms Theories and Applications: Evolutionary Algorithms, Optimization Techniques, Heuristics, Artificial Intelligence, Biologically inspired Algorithms [Paperback], LAP LAMBERT Academic Publishing, 2012

Book Reviews
• Stallings, W.: Computer Organization and Architecture, Prentice-Hall, 2002.
• Hamacher V., Vranesic Z. and Zaky S.: Computer Organization, McGraw-Hill, 2001.
• Ball S.R.: Embedded Microprocessor Systems, Real World Design, Newnes, Boston, 2000.

Journal Publications
• Khalifa, Y.M.A., Khan, B., Taha, F.: “Mutli-objective optimization tool for a free structure analog circuits design using genetic algorithms and incorporating parasitics,” International Journal of Artificial Evolution and Applications. Volume 1, ID 761380, 2008.
• Mohamed, R. and Al-Mourad B. and Khalifa, Y.: “Multiple Views in Peer Data Management for robust E-Commerce applications,” International Scientific Journal of Computing.
• Khalifa, Y.M.A., Khan, B., Begovic, J., Wisdom, A., Wheeler. A.M.: “Evolutionary Music Composer integrating Formal Grammar and Cellular Automata,” International Journal of Computational Intelligence: Theory and Practice, Vol 3, No. 1, 2008.
• Khalifa, Y.M.A.: “Multi-Objective Optimization Tool for a Free Structure Analog Circuits Design Using Genetic Algorithms and Incorporating Parasitics”, International Journal Programmable Devices, Circuits and Systems, Vol. 7, Issue 1, May 2007, pp 15-22.
• Mohamed, R. and Al-Mourad B. and Khalifa, Y. M.A.: “Super-peer P2P Systems Utilizing Mediated Knowledge-based and User Defined Views”, International Journal of Computer Networks and Internet Research, Vol. 7., No. 1, July 2007, pp 1-8.
• Shahin, A., Salem, O. and Khalifa, Y.M.A.: “Minimizing Cutting Wastes of Reinforcement Steel Bars Using Genetic Algorithms”, Journal of Construction Engineering and Management, Vol. 133, No. 12, December 2007, pp 982-992.
• Khalifa, Y.M.A., Khan, B., Begovic, J., Wisdom, A., Wheeler. A.M.: “Autonomous Music Composition Relying on Evolutionary Formal Grammar”, International Journal of Artificial Intelligence and Machine Learning, Vol. 7, Issue 1, June 2007, pp 33-39.
• Khalifa, Y.M.A, Okoene, E., and Al-Mourad, M.B.: “Autonomous Intelligent Agent-Based Tracking Systems, Recent Developments”, International Journal on Automatic Control and Systems Engineering, Vol. 7, Issue 1, May 2007, pp 21-31.
• Khalifa, Y.M.A., Foster, R.: “A Two-Stage Evolutionary Autonomous Music Composer”, Published as a chapter in “Applications of Evolutionary Computing” by Springer, and in the Journal of Lecture Notes on Computer Science, Vol. 1, No. 3907, 2006, pp 717-721.
• Fan. Y, and Khalifa, Y.M.A: “Neural Network Hardware Implementations”, International Journal of Computational Intelligence: Theory and Practice, Vol. 2, No. 1, June 2007, pp 67-87.
• Khalifa, Y. and Horrocks, D.H.: “Analogue Circuits Design Automation tool using Genetic Algorithms”, Malaysian Islamic International University IIUM Journal of Engineering, Malaysia. Vol. 1, No. 1, 2000. ISSN 1511-788X, pp 22–30.

Yaser M.A. Khalifa, Ph.D. Publications – Page 2

Selected Conference Publications
• Khalifa, Y., Khan, B.: “An Evolutionary Method for Analog Circuits Optimization Exploiting Mosfet-C Filters “ IEEE International Conference on Electronics, Circuits and Systems, Beirut, Lebanon, December 2011.
• Khalifa, Y., Khan, B., Begovic, J., Wisdom, A., Wheeler. A.M.: “Evolutionary Music Composer Integrating Formal Grammar Rules”, Poster presentation awarded Best Paper Award at the 15th Annual Statewide C-STEP Conference held in Bolton Landing, New York, April 2007.
• Khalifa, Y.M.A., Khan, B., Taha, F.: “Multi-Objective Optimization Tool for a Free Structure Analog Circuits Design Using Genetic Algorithms”, Proceedings of late breaking papers, Genetic and Evolutionary Computation Conference GECCO’07, London, July 2007.
• Khalifa, Y. and Okoene, E.: “A Comparison between Centralized and Distributed agent-based Evolutionary Target Tracking System”, Proceedings of the IEEE International Symposium on Signals, Circuits and Systems, December 2006.
• Khalifa, Y. and Okoene, E.: “A Centralized Evolutionary Target Tracking System”, Proceedings of the American Association of Engineering Education ASEE, Boston, MA, March 17 – 18, 2006.
• Mohamed, R. and Al-Mourad B. and Khalifa, Y.: “Towards Constructing Multiple Data Views in Peer Data Integration Systems”, Proceedings of the PhD Forum in British National Conference on Database, July 17, 2006, Belfast, Northern Ireland.
• Mohamed, R. and Al-Mourad B. and Khalifa, Y.: “A Vision to Construct Multiple Data Views in Peer Data”, Information Systems Technology and its Applications, 5th International Conference ISTA’2006, May 30-31, 2006, Klagenfurt, Austria. Also published as an extended abstract at the Notes on Informatics, Vol. 84 GI 2006, ISBN 3-88579-178-1.
• Khalifa, Y., Salem, O. and Shahin, A.: “Cutting Stock Waste Reduction Using Genetic Algorithms”, ACM Proceedings of the Genetics and Evolutionary Computational Conference GECCO 2006, July 8th 2006. ISBN 1-59593-186-4.
• Khalifa, Y. and Al-Murad: “Evolutionary Music Composer”, ACM Proceedings of the Genetics and Evolutionary Computational Conference GECCO 2006, Seattle, July 8th 2006. ISBN 1-59593-186-4.
• Mohamed, R. and Al-Mourad B. and Khalifa, Y.: “Towards Multiple Views in Peer Data Management Systems”, the Fourth International Conference on Computer Application, January, 2006.
• Khalifa, Y., Shi, H., Abreu, G., Bonny, S., and Ziender, J.: “Autonomous Evolutionary Music Composer”, demonstration session at the EvoMUSART workshop 2005, Lausanne, March 2005.
• Khalifa, Y. and Fan, Y. J.: “Evolutionary Neural Network Chips: A Review”, Proceedings of the 2005 Genetic and Evolutionary Computation Conference Washington, DC, June 2005.
• Khalifa, Y. and Okoene, E.: “A Distributed Agent-Based Surveillance System”, Proceedings of the IEEE International Symposium on Signals, Circuits and Systems, Iasi, Romania, July 2005.
• Khalifa, Y. and Okoene, E.: “Evolutionary Autonomous Agent-Based Target Tracking System”, Proceedings of the IEEE International Symposium on Signals, Circuits and Systems, Iasi, Romania, July 2005.
• Khalifa, Y., Shi, H. and Aabreu, G.: “Evolutionary Music Composer”, Proceedings of Late Breaking Papers at the Genetic and Evolutionary Computation Conference GECCO’04, Seattle, June 2004.
• Okoene, E. and Khalifa, Y.: ”An Autonomous Agent-Based Surveillance System“, Proceedings of Late Breaking Papers at the Genetic and Evolutionary Computation Conference GECCO’04, Seattle, June 2004.
• Khalifa, Y.: “Isomorphism elimination to Enhanced Design Centering of Analog Circuits Using GA and the Regionalization Method”, Proceedings of the IEEE International Conference on Electronics, Circuits and Systems ICECS’2003, UAE, December 2003
• Khalifa, Y., Costa, M. and Ziedner, J. : “Evolutionary Music Composer”, Proceedings of Late Breaking Papers at the Genetic and Evolutionary Computation Conference GECCO’02, Chicago, July 2003.
• Khalifa, Y., Costa, M., Ziedner, J., Ransom, R, Hirani, M, and Albani, S.: “Evolutionary Music Composer”, Poster presentation awarded Best Paper Award at the 11th Annual Statewide C-STEP Conference held in Bolton Landing, New York, April 2003.
• Khalifa, Y.: “Analog Circuits Design Centering Using a Hybrid GA Technique”, Proceedings of the IEEE International Conference on Electronics, Circuits and Systems ICECS’2003, Dubrovnik, September, December 2002.
• Khalifa, Y.: “Hybrid GA for Design Centering in Analog Circuits Design”, Proceedings of Late Breaking Papers at the Genetic and Evolutionary Computation Conference GECCO’00, San Francisco, July 2001.
• Khalifa, Y.: “Design Centering for Analog Components’ Values Using Parallel Genetic Algorithms”, The IEEE International Conference on Electronics, Circuits and Systems ICECS’2000, Beirut, December 2000.

Yaser M.A. Khalifa, Ph.D. Publications – Page 3

• Khalifa, Y. and Horrocks, D.H.: “Isomorphism Elimination for the Enhancement of Genetically Generated Analog Circuits”, Proc. of the IEEE International Symposium on Circuits and Systems ISCAS’99, Orlando, May 1999.
• Horrocks, D.H. and Khalifa, Y.: “Rapid Feasible Region Estimation for Enhanced Performance of Genetically Derived Circuit Design Technique”, Proceedings of The Fourth IEEE International Conference on Electronics, Circuits and Systems, Cairo, Dec. 1997.
• Horrocks, D.H. and Khalifa, Y.: “Evolutionary Design of Analogue Electronic Circuits; Current Status”, IEE Colloquium on Analogue Signal Processing, Oxford, UK, Nov. 1996, pp 7/1-7/8.
• Horrocks, D.H. and Khalifa, Y.: “Genetic Algorithm Design of Electronic Analogue Circuits Including Parasitic Effects”, Proc. First On-line Workshop on Soft Computing (WSC1), Nagoya University, Japan, Aug. 1996, pp 71-78.
• Horrocks, D.H. and Khalifa, Y.: “Genetically Evolved FDNR and Leap-Frog Filters using Preferred Components Values”, Proc. European Conference on Circuit Theory and Design, Istanbul, Turkey, Aug. 1995, pp 359-362.
• Horrocks, D.H. and Khalifa, Y.: “Genetically Derived Filters Circuits using Preferred Value Components”, Proc. IEE Colloquium on Analogue Signal Processing, Oxford, UK, Oct. 1994, pp 4/1-4/5.

SELECTED DESIGN AWARDS
General Purpose Neural Network Chip with On-chip Learning
Design used Xilinx XCV 1000 Field Programmable Gate Array (FPGA) and an adaptive filter for noise cancellation was used as a testing application. Awarded Second Place in the Scintilla Forum, organized by the Mid-Hudson Technology Council, May 2005.

SNAIR: Self Navigating Autonomous Intelligent Rover
Neural network based microcontroller programmed in both Assembly and C into a Motorola 68HC12 microcontroller chip. Awarded Second Place in the Scintilla Forum, organized by the Mid-Hudson Technology Council, May 2004.

PROFESSIONAL ACTIVITIES
Technical Committee Chair, International Conference on Systems,
Computing Sciences and Software Engineering, USA, 2007
Associate Editor of the International Journal on Systems,
Computing Sciences and Software Engineering to start publishing in 2008
Technical Committee Chair, International Conference on Systems,
Computing Sciences and Software Engineering, USA, 2006

Experience BACK TO TOP
Job Title Company Experience
Lead Hardware Engineer ABB Inc. – Present

Additional Info BACK TO TOP

Current Career Level: Experienced (Non-Manager)

Years of relevant work experience: 7+ to 10 Years

Date of Availability: Negotiable

Work Status: US – I am authorized to work in this country for any employer.

Active Security Clearance: None

US Military Service:

Citizenship: US citizen

Target Job: Target Job Title: R&D Hardware Design Engineer

Desired Job Type: Employee

Desired Status: Full-Time

Target Company: Company Size:

Occupation: Engineering • Bio-Engineering
• Electrical/Electronics Engineering

Target Locations: Selected Locations: US
US-PA-Allentown

Relocate: Yes

Willingness to travel: Up to 25% travel

Languages: Languages Proficiency Level
Arabic Fluent
English Fluent
French Beginner
Russian Beginner